Innoventions SIMCHECK II / II se PLUS Test Algorithms

    This application note can also be found as Appendix B in your Owner's Manual.

The SIMCHECK II / II se PLUS proprietary test algorithms were developed for optimum efficiency and fast testing. The tester utilizes different patterns and different algorithm types whenever the same module is re-tested. Tests are of type O(n), using MARCH, CHECKER, WALKING 0s, WALKING 1s and Surround Disturb Patterns.

The complexity of testing a memory chip can be understood from the following example: let us assume that we want to test a simple hypothetical memory chip of only 8 cells. A simple approach is to first write "0" in all the cells and verify that the cells hold the data, and then write "1" in all the cells and verify. Thus in only 16 write/read cycles we have "completely checked" this chip. However, there is a major flaw in this conclusion since it is possible that cell number 2 is shorting (or otherwise disturbing) cell 7, and the above test will not detect this!

An alternate approach is to exhaustively test the memory with all possible combinations of "0"s and "1"s in all the cells. First we write and verify with all "0"s. Second, we write and verify with "1" in cell 1 and "0"s in all other cells. The third test checks cell 2 with "1", "0"s in all others, etc. Overall, we need to test this hypothetical chip with 28=256 patterns, since each pattern has at least 8 write/read accesses to the chip. Based on the example above, it will take at least [256,000 x 2256,000] accesses to fully test a 256K memory chip. This number is astronomical - and therefore it is theoretically impossible to create a test for a modern memory chip with 100% accuracy.

Fortunately, most inter-cell disturbances in a memory chip occur between adjacent cells, so that a fully exhaustive test as mentioned above is not required.

During the years since our RAMCHECK and SIMCHECK line of products were first de-veloped, the test algorithms have been continuously improved to achieve unparalleled accuracy in testing memory chips. The proprietary programs, which have been thoroughly tested and refined in RAMCHECK and SIMCHECK, have been transported to SIMCHECK II and have been further improved. For example, using programmable voltage sources, our test algorithms use advanced tests incorporating Voltage Bounce and Voltage Cycling. The first provides higher accuracy in detecting pattern sensitivity and other intermittent memory problems. The latter provides additional assurance of proper product operation under the entire manufacturer's voltage specifications. Another addition is our Chip-Heat mode, which warms the tested module to true working temperatures, thereby improving the reliability of temperature related measurements. So despite the complexities enumerated above, your SIMCHECK II can trap most defective memory modules.

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