Innoventions Static Chip Tester, Discontinued

The optional STATIC RAM TESTER brings SIMCHECK's unique testing capabilities to the vast domain of the FAST STATIC RAM chips. The unit utilizes state of the art CMOS technology which enables the testing of both ultra FAST CACHE RAM and modern LOW POWER STATIC chips. It tests all the current state of the art STATIC RAM CHIPS including: 2Kx8; 8Kx8; 32Kx8; 64Kx8; 128Kx8; 512Kx8; 16Kx1; 64Kx1; 256Kx1; 1Mx1; 4Kx4; 16Kx4; 64Kx4 and 256Kx4. It can also perform speed measurements from 5nS to 151nS, at 2-4 nS increments.

STATIC RAM FUNDAMENTALS

While the STATIC RAM chips (called SRAM chips for short) provide the same essential Random Access Memory function as the DRAM memory chips, they differ significantly in their structure and technology. The DRAM memory chip utilizes only one transistor and one capacitor per each memory cell which contributes to their immense density (number of data bits/square inch of silicon) and low cost. However, the DRAM memory chip requires constant refreshing of the charge (data) stored in the cell's capacitor. The SRAM chip utilizes an arrangement which consists of a 4-transistor flip-flop for each cell. This arrangement is called static because the flip-flop retains the data indefinitely (as long as the power supply is connected to the chip). This STATIC arrangement is faster than DRAM technology and does not require any refresh scheme. However, STATIC RAM technology yields a much lower density than DRAM technology, and therefore SRAM chips are much more expensive. Because of their high speed and easy interface (due to the lack of refresh circuitry), SRAM chips are used for fast cache memory in most modern computers.

THE 3.3V FEATURE

All SRAM chips are specified to work with a single power supply (Vcc) in the range of at least 4.5V-5.5V power source. Many are further specified to work with a lower voltage source of 3.3V. SIMCHECK's EXTENSIVE test automatically identifies the lowest Vcc range of the tested SRAM chip.

THE 2.0V LOW VOLTAGE DATA RETENTION FEATURE

To work with battery backup arrangement, many CMOS SRAM chips have a data retention capability even when the power source falls to 2.0V. SIMCHECK's EXTENSIVE test automatically identifies and verifies this feature.

SRAM ACCESS TIMES

The SRAM access time which is marked on the chip relates to two different time intervals:

• Taa - Address Access Time - the time interval from the instant that the address input to the chip is stabilized to the instant in time when the stored data is stable in the chip's output.
• Tace - Chip Enable Access Time - the time interval from the instant that the SRAM's Chip Enable input is asserted to the instant in time when the stored data is stable in the chip's output. This access time is also called Tacs.

OPERATION

CAUTION: Never connect or disconnect the STATIC RAM TESTER to SIMCHECK when SIMCHECK IS ON. Insert or remove STATIC RAM CHIPS only when the SRAM POWER RED LED is off.

Turn SIMCHECK OFF. Connect the STATIC RAM TESTER to your SIMCHECK "RAMCHECK II EXPANSION" slot using the supplied polarized 50-conductor cable. Turn SIMCHECK ON.

The message "STATIC RAM TESTER IS ON" should be present for a few moments, then followed by the Title/Version message, and then reach the STANDBY screen, which prompts you to insert a static chip into the tester.

All STATIC RAM chips to be tested (regardless of their size) must be inserted into the ZIF socket in such a way, that the lower two pins are flush with the bottom of the socket. Please note the orientation drawing to the left of the ZIF socket. The ZIF socket is opened by lifting the lever up, closed by pushing the lever down.

To initiate the BASIC test, simply press F1. The display will show the chip's size and access time and will perform a complete test of the entire memory array using several test patterns. At the end of the test, the number of pins of the tested chip is also displayed.

The EXTENSIVE test for the STATIC RAM TESTER is initiated by F3. Note that unlike SIMCHECK DRAM testing, the EXTENSIVE test is activated by itself, without a need to first run the BASIC test (F1). The EXTENSIVE test starts in a way similar to the BASIC test. After the first test, which provides the same results of the BASIC test, the tester enters the 2.0 Volt DATA RETENTION test. You can see that the RED LED marked SRAM POWER becomes dim as the chip Vcc falls to 2.0V. Since the 2.0 Volt DATA RETENTION capability is optional (that is, some SRAM chips are not designed to have this feature), the test does not terminate if this mode fails. After the DATA RETENTION test, the tester determines the lowest Vcc with which full memory function still exists. While all SRAM chips should work with Vcc of 4.5V to 5.5V, many modern chips work at 3.3V. If the chip is of the CACHE type (that is, speed is less than 50nS), the EXTENSIVE test ends with a full test of the access time from Chip Enable (Tace). Measurement of Tace is always followed by '.' on the display.

After the active portion of EXTENSIVE test (during which the SRAM POWER RED LED is ON) terminates, the display shows the familiar check-mark graph with the OK beeps. At this time, you may remove the tested SRAM chip. A summary of the test results now sequence through the display. You can use ESC to quit the summary display and return to STANDBY mode, or Press F1 to accelerate the display. A new feature at this point is F2 which delays the sequence (each time you MOMENTARILY press F2 you add 4 seconds to the current display).

Required EPROM Version: 2.34 or above.